The present disclosure relates generally to electrical circuits. More particularly, the present disclosure relates to over-voltage protection of thin-oxide metal-oxide-semiconductor field-effect transistors (MOSFET) in circuits such as data converters.
Using different voltages to power different circuit segments is common in VLSI designs for data converters, including analog-to-digital converters (ADC) and digital-to-analog converters (DAC). The main purpose for this approach is to reduce power consumption. However, this approach provides over-voltage protection challenges for thin-oxide devices within the interfaces between the power domains. Theoretically the power up sequence could be controlled by an external power management unit, for example in portable devices. For instance, the system power could be sequenced from the highest power (for example, 3.3V) to the lowest power (for example, 1.2V). However for some applications, the power sequence is difficult to control due to other constraints. Therefore, internal circuits must have the capability to accommodate the different power sequences.
In modern submicron CMOS processes, reliability requirements for the power domain interfaces specify certain over-voltage device tolerance limits. Several failure mechanisms can occur when a voltage higher than the maximum voltage limit is applied upon either the gate or drain of the transistor devices.
A common solution to the problem is to put diode clamps in the power domain interfaces. However, in some applications such as data converters, high linearity is required within the signal paths. Accordingly, there is a need for a circuit-level solution.